DFT is an annual Symposium providing an open forum for presentations in the field of defect and fault tolerance in VLSI and nanotechnology systems inclusive of emerging technologies. One of the unique features of this symposium is to combine new academic research with state-of-the-art industrial data, necessary ingredients for significant advances in this field. All aspects of design, manufacturing, test, reliability, and availability that are affected by defects during manufacturing and by faults during system operation are of interest.
General Chairs
Prashant Joshi Intel, United States prashant.d.joshi@intel.com
Luigi Dilillo LIRMM, France luigi.dilillo@lirmm.fr
Program Chairs
Luca Cassano Politecnico di Milano, Italy luca.cassano@polimi.it
Sreejit Chakravarty Intel sreejit.chakravarty@intel.com
Special Session
Kanad Basu University of Texas, United States kanad.basu@utdallas.edu
Publicity
Pedro Reviriego Universidad Carlos III de Madrid, Spain revirieg@it.uc3m.es
Majed Valad Beigi AMD majed.valadbeigi@amd.com
Industrial Liason
Stephan Eggerglues Siemens, Germany stephan_eggersgluess@mentor.com
Sudhanva Gurumurthi AMD sudhanva.gurumurthi@amd.com
Publication
Alberto Bosio École Central de Lyon, France alberto.bosio@ec-lyon.fr
Audio/Visual
Lucas Matana Luza LIRMM, France lucas.matana-luza@lirmm.fr
Andre Mattos LIRMM, France andre.martins-pio-de-mattos@lirmm.fr
Web
Douglas Santos LIRMM, France douglas.almeida-dos-santos@lirmm.fr
DFT is an annual Symposium providing an open forum for presentations in the field of defect and fault tolerance in VLSI and nanotechnology systems inclusive of emerging technologies. One of the unique features of this symposium is to combine new academic research with state-of-the-art industrial data, necessary ingredients for significant advances in this field. All aspects of design, manufacturing, test, reliability, and availability that are affected by defects during manufacturing and by faults during system operation ar e of interest.
10月12日
2022
10月14日
2022
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