2017 IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference S3S

活动简介

The 2017 IEEE S3S Conference will take place October 16th – 19th in San Francisco, CA. This industry-wide event gathers together widely known experts, contributed papers and invited talks focused on SOI Technology, Low-Voltage Devices/Circuits/Architectures, and 3D Integration.

A special focus area of the Conference in 2017 will be on energy efficient computation and communication to empower small systems. This is a timely topic given recent projections that the number of internet –connected devices will grow to 75 billion by 2020. Energy-efficiency is key to enabling small, battery-powered sensors and wireless connectivity hubs. The IEEE S3S organizers are pleased that the core technologies of the S3S Conference are sure to play critical roles in efficient computation and communication in energy starved systems.

Included in the conference registration is a Tutorial on 3D Technologies. On Thursday, we will also offer a full-day short course on FDSOI Circuit Design. Panel Discussions, a Poster Session and networking opportunities round out the program.

This year we have expanded the range of the “Subthreshold Microelectronics” area to “Low-Voltage Microelectronics”, as with continued device scaling and lowering of threshold voltage the most energy efficient operating point is now often near-threshold and not below threshold.

征稿信息

重要日期

2017-05-22

摘要截稿日期

2017-07-01

初稿录用日期

征稿范围

SILICON-ON-INSULATOR (SOI)
For over 35 years our conference has been the premier meeting of engineers and scientists dedicated to current trends in Silicon-On-Insulators technology. Papers are solicited in all areas of SOI technology and related devices, circuits and applications, including:

Device Physics and Modeling
High-Voltage Devices
Advanced Materials, Substrates & Process Integration
Photonics
New SOI Structures, Circuits and Applications
Asynchronous Circuits
Sensors, NEMS, MEMS
SOI and FDSOI Manufacturability and Process Integration
Substrate Engineering
Fully-Depleted / Thin-Body Devices
Analog and RF Technologies
SOI Circuit Applications
Device Reliability and Characterization
RFID Technology and Applications
SOI-specific Design

LOW-VOLTAGE MICROELECTRONICS
Ultra-low-power/Ultra-low-voltage microelectronics will expand the technological capability of handheld and wireless devices by dramatically improving battery life and portability. Papers are solicited in the following technical focus areas, but research or concepts in any area of low-voltage microelectronics will be considered:

Unattended Remote Sensors
Space-Based Sensors
Biomedical Devices
Low-Voltage Handheld/wireless systems
Ultra-Low-Power Digital Computation
Analog and RF Technologies
Energy Management Circuits
Low Voltage Memory Technologies
Radiation Effects
Transistor Variability and Mitigation
Energy Harvesting Techniques
Asynchronous Circuits
Novel Device and Fabrication Technology
Robust Circuit Design

3D INTEGRATION
3D Integration, including monolithic 3D IC or sequential 3D IC, allows us to scale integrated circuits “orthogonally” in addition to classical 2D device and interconnect scaling. We will cover fabrication techniques, bonding methods as well as design and test methodologies. Novel inter-strata interconnect schemes will also be discussed. Previously unpublished papers are solicited in all of the above areas related to 3D implementation including: