Today  computing systems are still based on von Neumann (VN) architectures and still rely on many parallel (mini-)cores with a shared SRAM cache (parallel CPUs, GPUs, SIMD-VLIWs, and vector processors). It is well recognised that such solutions suffer from major limitations such as a decreased performance acceleration per core, increased power consumption, and limited system scalability. These limitations are mainly caused by the processormemory bottleneck. As the current data-intensive and big data applications require huge data transfers back and forth between processors and memories through load/store instructions, the maximal performance cannot be extracted as the processors will have many idle moments while waiting for data. Moreover, today抯 computers are manufactured using the traditional CMOS technology, which is reaching the inherent physical limits due to transistor down-scaling. Technology nodes far below 20 nm are presumably only practical for limited applications due to multiple challenges, such as high static power consumption, reduced performance gain, reduced reliability, complex manufacturing process leading to low yield and complex testing process, and extremely costly masks.
Many novel nano-devices and materials are under investigation to be combined with- or to replace- the CMOS in next IC generations. Among the emerging devices, such as graphene transistors, nanotube, tunnel field-effect transistor (TFET), etc., memristor is a promising candidate. Its advantages are CMOS process compatibility, lower cost, zero standby power, nanosecond switching speed, great scalability and high density, and non-volatile nature. It offers a high OFF/ON resistance ratio and it is promising to have a good endurance and retention time. More importantly, the memristor has a wide potential application including non-volatile memory applications, digital computing, neuromorphic computing, etc. This Session will discuss the use of memrisitive devices as enablers to set up major step toward a new generation of new ciruits, memories and computer architectures that address the major shortcomings of today抯 conventional architectures and technologies; namely, latency, energy, area efficiency, scalability, parallelism, etc. The potential of memristor devices will be discussed for logic design, memory design, and computer architectures designs. Hence three talks will be given by three recognised experts in related field as given below. A paper will be compiled based on the contribution of the three speakers and will be included in IDT proceedings.