550 / 2019-03-14 19:04:50

Full-Function On-Chip Verification Structures of Flip-flops

asynchronous reset D flip-flop, full-function, verification, on-chip

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In this paper, two verification units of asynchronous reset D flip-flop are proposed. Full-function verification can be accomplished by configuring a set of automatic test vectors with only one input and one output. On this basis, the proposed on-chip verification architecture can achieve large-scale testing of various types of verification modules by setting up decoders and multiplexers and adding only address ports. The comparison proves that the proposed on-chip verification structure can save 93% of the area and 95% of the test time in large-scale testing, and the test efficiency has been significantly improved.