515 / 2019-03-04 19:48:33

Capacitor-Less Low Dropout Regulator with High PSR in 0.1-10MHz Range

LDO, high PSR, Negative capacitor, transient response

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A high power supply rejection (PSR) low dropout (LDO) regulator is presented in the paper for system on chip applications. The small signal models of LDOs are analyzed and a power noise cancellation technique is developed. The PSR performance is improved by introducing a negative capacitor at the gate of power devices. The proposed technique is verified with an LDO that is simulated in a 0.18μm CMOS technology with a power supply of 1.2V. The entire LDO dissipate 76μA quiescent current. The PSR is better than -30dB for the 0.1MHz-10MHz frequency range when delivering a current of 10mA.