477 / 2019-02-27 23:33:15
A Background Timing Skew Calibration Technique in Time-Interleaved ADCs
timing skew, background calibration, time-interleaved ADCs, MATLAB simulation
终稿
Zekai Wu / Tsinghua University
Fule Li / Tsinghua University
Meng Ni / Tsinghua University
Yang Ding / Tsinghua University
Zhihua Wang / Tsinghua University
This paper presents a background timing skew calibration technique for time-interleaved analog-to-digital converters(ADCs). The timing skew between two adjacent sub- ADCs is detected in the digital domain through slope-based and statistics-based technique. Based on the detection error, the digitally controlled delay line(DCDL) is driven to minimum the timing skew. Using the proposed calibration algorithm in a 14-bit 500MS/s TI ADC model, the MATLAB simulation result shows a convergence time of 346ms under Nyquist frequency input with 1‰Ts initial timing mismatch, and the proposed method can effectively reduce hardware consumption in circuit implementation.
重要日期
  • 会议日期

    06月12日

    2019

    06月14日

    2019

  • 06月12日 2019

    初稿截稿日期

  • 06月14日 2019

    注册截止日期

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