474 / 2019-02-27 22:40:36
Composite FPGA-based Accelerator for Deep Convolutional Neural Networks
CNN,Deep learning,FPGA,Hardware affinity,Parallelism,Software and Hardware Design
终稿
Huan Zhang / Xi'an University of Technology
Yuan Yang / Xi'an University of Technology
Convolutional neural network (CNN) can achieve high prediction accuracy while they built complex models; however, high power consumption, memory demands, and bandwidth resource consumption by the models are creating enormous challenges in their actual deployment. To achieve the rapid prediction capabilities of high-precision models, a modified convolutional neural network model based on the GoogLeNet model has been proposed in this work, and a composite-structure convolutional neural network hardware accelerator compatible with the parallel computing model has been designed. An experimental model based the modified structure has been established and CIFAR-10 dataset was used to evaluate the prediction accuracy. The accelerator achieved 663 FPS peak performance with a 9.06% error rate, and was implemented on a Xilinx VC709. Compared to CPU and GPU, its energy efficiency increased by a factor of 7.1 and 1.9, respectively, achieving a high-precision complex network computing acceleration.
重要日期
  • 会议日期

    06月12日

    2019

    06月14日

    2019

  • 06月12日 2019

    初稿截稿日期

  • 06月14日 2019

    注册截止日期

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Xi'an University of Technology
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