418 / 2019-02-26 11:04:09

Monolithically Integrated E/D InAlN/GaN HEMT And Inverters On Sapphire Substrate

InAlN/GaN HEMT,enhancement-mode/ depletion-mode,gate-recess,inverter

全体主题 > Compound Semiconductor Devices

GaN DFCL inverters by using integrated enhancement/depletion-mode (E/D-mode) InAlN/GaN HEMTs were fabricated and characterized. The E-mode InAlN/GaN HEMT was realized by utilizing low damage BCl3-based gate recess etching, which exhibits a high peak transconductance of 435mS/mm with a threshold voltage of 0.74V. At a supply of 2.5V, the E/D inverter shows an output logic swing of 2.19V, a logic-low noise margin of 0.54V and a logic-high noise margin of 1.38V.