144 / 2023-09-24 15:21:47
Behavioral Modeling of Time-interleaved Pipeline ADC with Errors
time interleaving technology,pipeline ADC,behavioral modeling,errors
终稿
Runze Yu / Harbin Institute of Technology
Datong Liu / Harbin Institute of Technology
Xiyuan Peng / Harbin Institute of Technology
The Analog-to-Digital Converter (ADC) is a crucial component that converts analog signals into digital signals, playing an indispensable role in data acquisition systems. This paper focuses on studying time-interleaved pipeline ADC, a novel architecture that combines time interleaving technology with the characteristics of pipeline ADCs. It possesses potential advantages in terms of high performance and low power consumption, but the dynamic cascading of modules and sources of errors requires further in-depth research. This paper primarily concentrates on behavioral modeling, error analysis, and performance testing of time-interleaved pipeline ADCs. We have designed a behavioral-level model with error characteristics. This model aims to provide a more comprehensive and accurate description of the modules' dynamic behavior and operational processes within a time-interleaved pipeline ADC. Additionally, we have analyzed error characteristics to explore the various types of errors generated by different modules and their respective magnitudes of influence. This is paramount in establishing the performance limits and optimization paths for the time-interleaved pipeline ADC. Through performance testing of the ADC, we have validated the accuracy of the designed model.
重要日期
  • 会议日期

    11月02日

    2023

    11月04日

    2023

  • 12月15日 2023

    初稿截稿日期

  • 12月20日 2023

    注册截止日期

主办单位
IEEE Instrumentation and Measurement Society
Xidian University
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