Life-Time Reliability for Memory Devices in AI Chip
编号:5 访问权限:仅限参会人 更新:2021-08-17 16:09:07 浏览:434次 主旨报告

报告开始:2021年08月19日 10:30(Asia/Shanghai)

报告时间:45min

所在会场:[PS] Plenary Session(Openning, Keynotes 1-6) [PS1] Openning and Keynote 1/2/3

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摘要
This talk covers the life-time reliability challenges for massive numbers of memory devices used in data center, especially in AI computing servers. We will break down the challenges into several phases and indicate the potential directions to solve the issue. This includes the supplier quality control and effective communication, system level qualification and manufacturing screening strategy, and the most important, the RAS strategy and technologies when products are in service. The trade-off between product reliability, performance and cost is also considered.
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报告人
XinLi Gu
Chief Architect Reli Huawei Technology Co., Ltd.

Xinli Gu has been a Chief Architect Reliability with Huawei Technologies, Co. Ltd. since 2011. He is responsible for Data Center AI Computing & Storage product reliability solutions. He was a director with Cisco Systems, Inc. in 1998 to 2011, responsible for corporate level design solutions for product quality and reliability, and automated manufacturing test and diagnosis. Xinli also worked for Synopsys in California and Ericsson in Sweden. He received BSc in Computer Science from Shanghai JiaoTong University, and MSc/PhD in Computer Science and Information from Linkoping University, Sweden. He has published 50+ technical papers and holds several US patents. He is an active IEEE member leading system/ASIC/test/reliability areas.
 

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重要日期
  • 会议日期

    08月18日

    2021

    08月20日

    2021

  • 05月10日 2021

    初稿截稿日期

  • 08月16日 2021

    提前注册日期

  • 08月19日 2021

    报告提交截止日期

  • 08月20日 2021

    注册截止日期

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